NetVision SVP-01-GEN Parallel Generator

NetVision
Supplier / Manufacturer: NetVision
Model: SVP-01-GEN

The NetVision SVP-01-GEN is a parallel video generator and camera emulation board that converts USB 3.0 or DisplayPort video into configurable parallel output for ECU, image-processor, and automotive camera-system development.

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SVP-01-GEN Parallel Video Generator & Camera Emulator

The NetVision SVP-01-GEN is a parallel video generator designed to reproduce recorded or computer-generated video as configurable camera signals for ECU, image-processor, and embedded vision development.

Video from a Windows PC through USB 3.0 or from a DisplayPort source can be converted into parallel video output. Recorded camera footage and computer-generated images can therefore be supplied to a device under test as simulated camera data without requiring the target camera module or CMOS image sensor.

Up to 150 MHz High-speed parallel video output for camera emulation
Up to 32-bit Configurable 8-, 16-, 24-, and 32-bit parallel output
USB 3.0 + DisplayPort Flexible PC playback and external video input
Camera Emulation Replay controlled video to ECUs and image processors

Output timing, blanking, frame rate, resolution, synchronization, and pixel format can be configured to reproduce different camera-output conditions. The board also provides I2C, GPIO, FSYNC input, reset output, and clock output for integration with target devices.

Compatible NetVision serializer boards can be connected to create automotive camera-emulation environments using interfaces such as FPD-Link III and GMSL.

High-Speed Parallel Video Output

Generates parallel video signals at pixel-clock frequencies up to approximately 150 MHz for camera-module, ECU, and image-processor development.

8- to 32-bit Parallel Output

Supports configurable 8-, 16-, 24-, and 32-bit parallel video output for a wide range of camera and image-processing interfaces.

USB 3.0 Video Playback

Transfers recorded or computer-generated video from a Windows PC through USB 3.0 for repeatable camera-emulation and validation workflows.

DisplayPort Video Input

Accepts DisplayPort 1.1a video input and converts it to configurable parallel video output for external playback and development environments.

Configurable Camera Emulation

Output timing, blanking, frame rate, resolution, and other signal parameters can be adjusted to reproduce different camera-output conditions.

YUV & RGB Output

Supports YUV422 8-bit and RGB24 pixel formats for common camera-module and image-processing applications.

FSYNC & External Control

Provides FSYNC signal input together with reset and clock outputs for synchronization with ECUs, image processors, and external test systems.

I2C & GPIO Interfaces

Includes I2C operation up to 400 kHz and configurable GPIO for camera, SerDes, and peripheral-device control.

Flexible I/O Voltage

Provides configurable VDDL from 1.8 to 3.3 V and VDDH from 1.2 to 3.6 V for connection to different target devices and interface boards.

Automotive Serializer Integration

Supports compatible NetVision serializer boards for FPD-Link III, GMSL, and other automotive camera-interface evaluation environments.

Building a complete automotive camera test environment? Combine the SVP-01-GEN with a compatible NetVision serializer interface board to reproduce camera video for ECU and image-processing validation. View NetVision SerDes Interface Boards →

Parallel camera-module emulation
Automotive ECU video-input validation
CMOS image-sensor emulation
DSP and image-processor verification
Recorded road-video playback
Automotive SerDes camera simulation
Development before camera hardware is available
Production and automated ECU testing

SVP-01-GEN Specifications

Video Input Interface USB 3.0 (Windows); DisplayPort 1.1a
Input Mode USB 3.0 and DisplayPort are selectable modes; simultaneous input is not supported
DisplayPort Input 2.7 Gbps/lane × 2 lanes; RGB24 input
Video Output Interface Parallel video signal
Maximum Output Resolution 8190 × 4095 pixels; 4094 × 4095 for 8-bit output
Synchronization Signals VSYNC, HSYNC, Pixel Clock; Embedded Sync (BT.656) and Data Enable supported
Pixel Clock Up to approximately 150 MHz
Supported Pixel Formats YUV422 8-bit, RGB24
Output Bit Width 8 / 16 / 24 / 32 bit
I2C 1 channel; up to 400 kHz
GPIO 16-bit available with CN5 installed; GPIO and image output combined up to 32 bits
I/O Voltage VDDL = 1.8 to 3.3 V
Connection Board Power VDDH = 1.2 to 3.6 V
Other Functions Reset signal output, clock signal output, FSYNC signal input
Interface Connector 50 + 10 pin, 2.54 mm pitch pin header
FPGA AMD Xilinx Artix-7 XC7A35T
Frame Memory 256 MB DDR3-SDRAM
USB Controller Cypress EZ-USB FX3
Power Input USB bus power or dedicated 2-pin connector; +5 V (4.75–5.5 V)
Dimensions 101.6 × 101.6 × 25.7 mm, including 10 mm spacer height
Windows Video Software NVFilePlayer, SVOGenerator
I2C Control Software SVMCtl